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首页> 外文期刊>IEEE Transactions on Signal Processing >Parallel processing architectures for rank order and stack filters
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Parallel processing architectures for rank order and stack filters

机译:等级排序和堆栈过滤器的并行处理架构

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Many architectures have been proposed for rank order and stack filtering. To achieve additional speedup in these structures requires the use of parallel processing techniques such as pipelining and block processing. Pipelining is well understood but few block architectures have been developed for rank order and stack filtering. Block processing is essential for additional speedup when the original architecture has reached the throughput limits caused by the underlying technology. A trivial block structure simply repeats a single input, single output structure to generate a multiple input, multiple output structure. Therefore the architecture can achieve speedups equal to the number of multiple outputs or the block size. However, unlike linear filters, the rank order and stack filter outputs are calculated using comparisons. It is possible to share these comparisons within the block structure and thus substantially reduce the size of the block structure. The authors introduce a systematic method for applying block processing to rank order filters and stack filters. This method takes advantage of shared comparisons within the block structure to generate a block filter with shared substructures whose complexity is reduced by up to one-third compared to the original filter structure times the block size. Furthermore, block processing is important for the generation of low power designs. A block structure can trade its increased speedup for a throughput equal to the original single output architecture but with a significantly lower power requirement. The power reduction in the trivial block structures is limited by the power supply voltage. They demonstrate how block structures with shared substructures allow them to continue decreasing the power consumption beyond the limit imposed by the supply voltage.
机译:已经提出了许多用于等级顺序和堆栈过滤的体系结构。为了在这些结构中实现额外的加速,需要使用并行处理技术,例如流水线和块处理。流水线已广为人知,但很少开发用于块顺序和堆栈过滤的块体系结构。当原始体系结构已达到由基础技术引起的吞吐量限制时,块处理对于提高速度至关重要。琐碎的块结构简单地重复单个输入,单个输出结构以生成多个输入,多个输出结构。因此,该架构可以实现等于多个输出数量或块大小的加速比。但是,与线性滤波器不同,使用比较来计算等级顺序和堆栈滤波器的输出。可以在块结构内共享这些比较,从而显着减小块结构的尺寸。作者介绍了一种将块处理应用于排序滤波器和堆栈滤波器的系统方法。该方法利用了块结构内的共享比较来生成具有共享子结构的块滤波器,与原始滤波器结构乘以块大小相比,该子结构的复杂度降低了多达三分之一。此外,块处理对于生成低功耗设计很重要。块结构可以将其提高的速度换成等于原始单输出体系结构的吞吐量,但功耗却大大降低。平凡的块结构中的功率降低受到电源电压的限制。他们演示了具有共享子结构的块结构如何使它们继续降低功耗,使其超过电源电压施加的限制。

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