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首页> 外文期刊>Semiconductor Manufacturing, IEEE Transactions on >Pattern-Independent PMD Layer Planarization by Controlling its Volume Before CMP
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Pattern-Independent PMD Layer Planarization by Controlling its Volume Before CMP

机译:通过在CMP前控制其体积来实现与模式无关的PMD层平面化

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摘要

We achieved excellent planarization for a pre-metal dielectric (PMD) layer regardless of its pattern density distribution by making the distribution uniform before chemical mechanical polishing (CMP) without any stopper layer. The distribution control was done by lithography using a checkered reticle on the high-density PMD area followed by etching of the PMD layer to uniformize the CMP rates at both areas. After this planarization, the PMD layer was flattened in the local and global regions. The PMD step-height within chip was approximately 8 nm (approximately 1% of PMD height), which is a variation of less than one tenth compared with conventional planarization, and the non-uniformity of PMD thickness within wafer was approximately 2%. The planarized PMD layer suppressed the defocusing in lithography for contact hole formation on the layer, thus dramatically reducing contact-open failures in a chip of approximately nm in diameter with 620-nm high-contact holes. The number of defects was one-thousandth that of a conventionally planarized PMD layer.
机译:通过在化学机械抛光(CMP)之前没有任何阻挡层的情况下使分布均匀,我们对预金属电介质(PMD)层实现了出色的平坦化,无论其图案密度分布如何。分布控制是通过在高密度PMD区域上使用方格分划板进行光刻来完成的,然后蚀刻PMD层以使两个区域的CMP速率均匀。在此平面化之后,PMD层在局部和全局区域被平坦化。芯片内的PMD台阶高度约为8 nm(约为PMD高度的1%),与传统的平面化相比,变化幅度不到十分之一,晶片内PMD厚度的不均匀性约为2%。平坦化的PMD层抑制了光刻在层上形成接触孔的散焦,从而显着减少了直径为620 nm的具有620 nm高接触孔的芯片中的接触断开故障。缺陷数量是传统平面化PMD层的千分之一。

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