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A generalized algorithm for the capacitance extraction of 3D VLSI interconnects

机译:3D VLSI互连电容提取的通用算法

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In this paper, a generalized algorithm based upon the nonoverlapping domain decomposition method (NDDM) is presented for the capacitance extraction of three-dimensional (3-D) VLSI interconnects. The subdomains with conductors are analyzed by the finite-difference method, while the subdomains with pure dielectric layers are analyzed with the eigenmode expansion technique. The central processing unit time and memory size used by the NDDM are unrelated to the thickness of pure dielectric layers. NDDM's computing time grows as O(n) if the number of domain iterations is bounded. Also, benchmarks show that it is approximately 15 times less than those used by Ansoft's Maxwell SpiceLink. In addition, only a two-dimensional mesh is needed to analyze 3-D structures. This greatly reduces the algorithm complexity and makes it easy and straightforward to interface with layout automation software.
机译:本文提出了一种基于非重叠域分解方法(NDDM)的通用算法,用于三维(3-D)VLSI互连的电容提取。用有限差分法分析带有导体的子域,而用本征模扩展技术分析具有纯介电层的子域。 NDDM使用的中央处理单元时间和内存大小与纯介电层的厚度无关。如果域迭代次数受限制,则NDDM的计算时间将增长为O(n)。而且,基准测试表明,它大约比Ansoft的Maxwell SpiceLink使用的数量少15倍。此外,只需要一个二维网格即可分析3-D结构。这大大降低了算法的复杂性,并使其易于和直接与布局自动化软件进行交互。

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