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首页> 外文期刊>IEEE Transactions on Microwave Theory and Techniques >Integrated power transistor in 0.18-/spl mu/m CMOS technology for RF system-on-chip applications
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Integrated power transistor in 0.18-/spl mu/m CMOS technology for RF system-on-chip applications

机译:采用0.18- / spl mu / m CMOS技术的集成功率晶体管,用于RF片上系统应用

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摘要

A novel design and performance of a power MOS transistor for RF system-on-chip applications are reported. The power MOS transistor with high breakdown voltage is integrated into 0.18-/spl mu/m CMOS technology with only one additional mask. By an optimized design considering all aspects of DC and RF performances, a power MOS transistor with 16-GHz cutoff frequency and 24-GHz maximum oscillation frequency has been demonstrated. In addition, the power gain is 12 dB at 2.4 GHz with power-added efficiency of 50%. In this study, the device architectures that include drain engineering, substrate engineering, and gate scaling are investigated comprehensively.
机译:报告了用于RF片上系统应用的功率MOS晶体管的新颖设计和性能。具有高击穿电压的功率MOS晶体管已集成到0.18- / spl mu / m CMOS技术中,仅具有一个额外的掩模。通过考虑直流和射频性能各个方面的优化设计,已经证明了具有16 GHz截止频率和24 GHz最大振荡频率的功率MOS晶体管。此外,功率增益在2.4 GHz时为12 dB,功率附加效率为50%。在这项研究中,对包括漏极工程,衬底工程和栅极缩放的器件架构进行了全面研究。

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