High voltage transistor integrated into CMOS logic structures for e.g. smart power technology, combines junction- and complementary metal oxide transistor structures

摘要

The semiconducting substrate (1) includes a semiconducting zone (11) of first conductive type, with greater doping than the substrate, in a first lateral zone (111) of the substrate. A third semiconducting zone (3) of second, opposite conductive type, extends in the first zone (11) and is connected electrically to the source connection (S). This zone is spaced laterally from the substrate/first zone boundary. It borders the gate connection (G) laterally, but is insulated from it by a dielectric (9) layer. A fourth semiconducting zone (4) of the first type, extends inside the first zone (11) and is electrically connected to the source connection. Further fifth- (5), sixth- (6) and trenched- (20) zones of the structure are detailed.