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Directional Coupler Compensation With Optimally Positioned Capacitances

机译:具有最佳位置电容的定向耦合器补偿

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摘要

An accurate design synthesis for the phase velocity compensation in coupled line microstrip couplers by means of parallel capacitances is presented. In contrast to previous approaches, an a priori arbitrary placement of the capacitances along the coupled line structure is considered. By optimizing these positions, the directivity-bandwidth performance is significantly improved. Cases with two and three capacitances are treated extensively. The findings are used to generalize the compensation scheme to any number of capacitances. Throughout the analysis, the parasitic even-mode capacitance is taken into account using a realistic model. Several design examples are presented. Simulation results are confirmed by measurements. They compare favorably with those reported previously.
机译:提出了一种利用并联电容对耦合线微带耦合器进行相速度补偿的精确设计综合方法。与先前的方法相反,考虑沿耦合线结构的电容的先验任意布置。通过优化这些位置,可以显着改善方向性带宽性能。具有两个和三个电容的情况得到了广泛的对待。这些发现可用于将补偿方案推广到任意数量的电容。在整个分析过程中,使用实际模型将寄生偶数模式电容考虑在内。给出了几个设计实例。仿真结果通过测量得到证实。他们比以前报道的好。

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