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首页> 外文期刊>Microwave Theory and Techniques, IEEE Transactions on >A 37.5-mW 8-dBm-EIRP 15.5 src='/images/tex/540.gif' alt='^{circ}'> -HPBW 338-GHz Terahertz Transmitter Using SoP Heterogeneous System Integration
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A 37.5-mW 8-dBm-EIRP 15.5 src='/images/tex/540.gif' alt='^{circ}'> -HPBW 338-GHz Terahertz Transmitter Using SoP Heterogeneous System Integration

机译:37.5-mW 8-dBm-EIRP 15.5 src =“ / images / tex / 540.gif” alt =“ ^ {circ}”> -HPBW 338-GHz使用SoP异构系统集成的太赫兹变送器

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A low-cost terahertz transmitter is proposed by using system-on-package (SoP) heterogeneous system integration. A signal source in 40-nm CMOS is integrated with an antenna array on a Benzocyclobutene carrier through a broadband low-loss terahertz interconnect. The signal source adopting triple-push oscillator topology is able to produce a differential output without any additional balun circuit. Hence, the power consumption and the chip area can be reduced. The antenna array containing 50 patch antennas is differentially excited to give simulated directivity, efficiency, and antenna gain as high as 22.6 dB, 88%, and 22 dBi, respectively, at 335 GHz. The terahertz interconnect employs a resonator coupling technique to provide low-loss and broadband performance while occupying a small area. Measured results show that the proposed terahertz transmitter can work at 338.4 GHz with equivalent isotropically radiated power (EIRP) of 8.0 dBm while consuming only 37.5 mW from a 1-V supply. The measured half-power beam-width can be as narrow as 15.5. The EIRP can be further raised to 9.5 dBm as the supply is increased to 1.3 V. The CMOS chip only occupies an area as small as 0.028 . All of the design efforts enable the proposed terahertz transmitter to feature in small form factor, low power dissipation, low cost, and high performance. To the best of the authors' knowledge, this is the most compact, lowest power, lowest cost, and high-performance SoP-based terahertz transmitter reported thus far.
机译:通过使用系统级封装(SoP)异构系统集成,提出了一种低成本的太赫兹发射机。 40纳米CMOS信号源通过宽带低损耗太赫兹互连与苯并环丁烯载体上的天线阵列集成在一起。采用三重推挽振荡器拓扑的信号源能够产生差分输出,而无需任何额外的巴伦电路。因此,可以减小功耗和芯片面积。包含50个贴片天线的天线阵列被差分激励,以在335 GHz频率下分别提供高达22.6 dB,88%和22 dBi的模拟方向性,效率和天线增益。太赫兹互连采用谐振器耦合技术,以提供低损耗和宽带性能,同时占用较小的面积。测量结果表明,建议的太赫兹发射机可以在338.4 GHz的频率下工作,等效全向辐射功率(EIRP)为8.0 dBm,而1-V电源仅消耗37.5 mW。测得的半功率波束宽度可以窄至15.5。当电源增加至1.3 V时,EIRP可以进一步提高至9.5dBm。CMOS芯片仅占用0.028的面积。所有的设计工作都使所建议的太赫兹发射器具有体积小,功耗低,成本低和性能高的特点。据作者所知,这是迄今为止报道的最紧凑,最低功耗,最低成本和高性能的基于SoP的太赫兹发射器。

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