Wireless Time Transfer With Subpicosecond Accuracy Based on a Fully Integrated Injection-Locked Picosecond Pulse Detector

摘要

An injection-locked picosecond pulse detector is implemented in 65-nm CMOS technology. An on-chip slot planar inverted cone antenna receives picosecond pulses with a center frequency of 77 GHz and feeds the signal to a low-noise amplifier. A three-stage injection-locked frequency divider is used to lock the output signal to the 9.6-GHz repetition rate with an effective locking range of 142 MHz and a timing jitter of 0.29 ps(rms) . The injection-locked detector is utilized in a wireless time transfer setup to demonstrate its application in widely spaced synchronized distributed arrays. This fully integrated system consumes 42 mW from a 1.3-V supply and occupies a total area of 0.9 mm(2), including the on-chip antenna and the pads.