机译:耦合感知的高级互连综合[IC布局]
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., South Korea;
integrated circuit layout; integrated circuit interconnections; circuit optimisation; low-power electronics; coupled circuits; data flow graphs; interconnect optimization; low power; coupling-aware interconnect synthesis; high-level interconnect synthesis; bus power dissipation; signal line self transition activities; coupled transition activities; on-chip bus synthesis; scheduled dataflow graph; data transfer binding; power consumption reduction; coupling capacitance;
机译:在基于SRAM的FPGA上具有SEU意识的高级数据路径综合和布局生成
机译:高水平综合中的资源共享与布局效应相结合
机译:互连感知的低功耗高级综合
机译:低功耗的耦合感知高级互连综合
机译:用于以互连为中心的VLSI设计的整合逻辑和布局综合。
机译:CMOS相容催化剂的垂直碳纳米管互连结构的合成
机译:低功耗的耦合感知高级互连综合
机译:二氟化二氮化学。改进的顺式 - 和反式 - N2F2的合成,N2F + sn2F9的合成和表征高级电子结构计算顺式-N2F2,反式N2F2,F2N = N和N2F +,以及N2F2的反式顺式异构化机理(预印本)