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Symbolic Matching and Constraint Generation for Systematic Comparison of Analog Circuits

机译:用于模拟电路系统比较的符号匹配和约束生成

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摘要

This paper proposes an automated technique for systematically generating comparison data between two analog circuits. The comparison data presents the similar and distinguishing performance characteristics of the circuits with respect to DC-gain, bandwidth, common-mode rejection ratio, noise, and sensitivity. The comparison data is important for getting insight into the common and unique benefits of a circuit, selecting fitting circuit topologies for system design, and refining and optimizing circuit topologies. The technique utilizes matching of the topologies and symbolic expressions of the compared circuits to find the nodes with similar electric behavior. The impact on performance of the unmatched nodes is used to express the differentiating characteristics of the circuits. Experiments illustrate the technique for a pair of analog circuit designs.
机译:本文提出了一种自动技术,用于系统地生成两个模拟电路之间的比较数据。比较数据显示了在直流增益,带宽,共模抑制比,噪声和灵敏度方面电路的相似和不同的性能特征。比较数据对于深入了解电路的共同和独特优势,为系统设计选择合适的电路拓扑以及完善和优化电路拓扑至关重要。该技术利用比较电路的拓扑和符号表达式的匹配来找到具有相似电行为的节点。对不匹配节点的性能的影响用来表示电路的差异特性。实验说明了用于一对模拟电路设计的技术。

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