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Reliable Radix-4 Complex Division for Fault-Sensitive Applications

机译:适用于故障敏感应用程序的可靠Radix-4复杂分区

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摘要

Complex division is commonly used in various applications in signal processing and control theory including astronomy and nonlinear RF measurements. Nevertheless, unless reliability and assurance are embedded into the architectures of such structures, the sub-optimal (and thus erroneous) results could undermine the objectives of such applications. As such, in this paper, we present schemes to provide complex number division architectures based on Sweeney, Robertson, and Tocher-division with error detection mechanisms. Different error detection architectures are proposed in this paper which can be tailored based on the eventual objectives of the designs in terms of area and time requirements, among which we pinpoint carefully the schemes based on recomputing with shifted operands to be able to detect faults based on recomputations for different operands in addition to the unified parity (simplified detecting code) and hardware redundancy approach. The design also implements a minimized look up table approach which favors in error detection based designs and provides high fault coverage with relatively-low overhead. Additionally, to benchmark the effectiveness of the proposed schemes, extensive error detection assessments are performed for the proposed designs through fault simulations and field-programmable gate array (FPGA) implementations; the design is implemented on Xilinx Spartan-6 and Xilinx Virtex-6 FPGA families.
机译:复数除法通常用于信号处理和控制理论的各种应用中,包括天文学和非线性RF测量。但是,除非将可靠性和保证性嵌入到此类结构的体系结构中,否则次优(因而是错误的)结果可能会破坏此类应用程序的目标。因此,在本文中,我们提出了利用错误检测机制提供基于Sweeney,Robertson和Tocher除法的复数除法架构的方案。本文提出了不同的错误检测体系结构,可以根据设计的最终目标在面积和时间要求方面进行定制,其中,我们仔细地确定了基于移位操作数重新计算的方案,以便能够基于错误检测到错误。除了统一的奇偶校验(简化的检测代码)和硬件冗余方法外,还对不同的操作数进行了重新计算。该设计还实现了最小化的查找表方法,该方法有利于基于错误检测的设计,并提供较高的故障覆盖率和相对较低的开销。另外,为了验证所提出方案的有效性,通过故障仿真和现场可编程门阵列(FPGA)实施对所提出的设计进行了广泛的错误检测评估。该设计在Xilinx Spartan-6和Xilinx Virtex-6 FPGA系列上实现。

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