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首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver
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A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver

机译:一个0.18- / spl mu / m CMOS 10-Gb / s双模10-PAM串行链路收发器

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摘要

A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power dissipation of the transceiver is much reduced. In addition, compared with a standard 16-PAM technique, the dual-mode 10-PAM technique can reduce power dissipation by 62.5%. The transmitter including a pseudo random bit sequence (PRBS) generator, multiplexers, an encoder, and an output driver achieves 10-Gb/s data-rate with 235-mW power dissipation such that the figure of merit (FOM) of the transmitter part is 23.5 mW/(Gb/s). The receiver including a flash type analog-to-digital converter (ADC), a decoder, and output drivers achieves 10-Gb/s data-rate and 10-12 BER with 190-mW power dissipation such that FOM of the receiver part is 19 mW/(Gb/s). The proposed 10-PAM transceiver was implemented in a 0.18-μm standard CMOS technology with 0.3 × 0.8-mm2 active area.
机译:提出了一个0.18μmCMOS 10Gb / s串行链路收发器。为了提高功率效率,收发器采用双模式10级脉冲幅度调制(10-PAM)技术,每个符号可传输4位。由于内部电路的工作频率降低了4,收发器的功耗大大降低。此外,与标准的16-PAM技术相比,双模式10-PAM技术可将功耗降低62.5%。该发送器包括伪随机比特序列(PRBS)发生器,多路复用器,编码器和输出驱动器,可实现10 Gb / s的数据速率,功耗为235 mW,因此发送器部分的品质因数(FOM)是23.5 mW /(Gb / s)。该接收器包括闪存型模数转换器(ADC),解码器和输出驱动器,可实现10 Gb / s的数据速率和10 -12 BER,功耗为190mW,例如接收器部分的FOM为19 mW /(Gb / s)。拟议中的10-PAM收发器采用0.18μm标准CMOS技术实现,有源区域为0.3×0.8mm 2

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