机译:带有双SRAM架构的充电域可伸缩性重量计算宏,用于精密可扩展的DNN加速器
Samsung Elect Memory Div Suwon 16677 South Korea;
Samsung Elect Memory Div Suwon 16677 South Korea;
Sungkyunkwan Univ Dept Elect & Comp Engn Suwon 16419 South Korea;
Sungkyunkwan Univ Dept Elect & Comp Engn Suwon 16419 South Korea;
Sungkyunkwan Univ Dept Elect & Comp Engn Suwon 16419 South Korea;
Sungkyunkwan Univ Dept Semicond & Display Engn Suwon 16419 South Korea;
Sungkyunkwan Univ Dept Semicond & Display Engn Suwon 16419 South Korea;
Sungkyunkwan Univ Dept Elect & Comp Engn Suwon 16419 South Korea;
Sungkyunkwan Univ Dept Artificial Intelligence Suwon 16419 South Korea;
Sungkyunkwan Univ Dept Elect & Comp Engn Suwon 16419 South Korea;
Sungkyunkwan Univ Dept Elect & Comp Engn Suwon 16419 South Korea;
Computer architecture; Microprocessors; Merging; Capacitors; SRAM cells; Couplings; Transistors; In-memory computing; deep neural networks; charge-domain compute; machine learning; bit-scalable;
机译:在65-NM CMOS中使用内存入门计数的基于内存入口计数的算法 - 电路 - 电路 - 电路架构的通信感知DNN加速器
机译:基于内存计算的机器学习加速器的电路和架构
机译:使低功率电荷域非易失性与铁电FET一起计算
机译:PIMCA:用于片上DNN推理的28nm中的3.4 MB可编程内存计算加速器
机译:模拟,映射和编程在内存计算架构中的FPGA
机译:使低功率电荷域非易失性与铁电FET一起计算