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Hybrid integration of VCSEL's to CMOS integrated circuits

机译:VCSEL与CMOS集成电路的混合集成

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摘要

Three hybrid integration techniques for bonding vertical-cavitynsurface-emitting lasers (VCSELs) to CMOS integrated circuit chips havenbeen developed and compared in order to determine the optimum method ofnfabricating VCSEL based smart pixels for optical interconnects andnfree-space optical processing. Each of the three bonding techniques usedndifferent ways of attaching the VCSEL to the integrated circuit andnmaking electrical contacts to the n- and p-mirrors. All three techniquesnremove the substrate from the VCSEL wafer leaving an array of individualnVCSELs bonded to individual pixels. The 4×4 and/or 8×8narrays of bonded VCSELs produced electrical and optical characteristicsntypical of unbonded VCSELs. Threshold voltages down to 1.5 V and dynamicnresistance as low as 30 Ω were measured, indicating goodnelectrical contact was obtained. Optical power as high as ~10 mW for anVCSEL with a 20-Μm aperture and 0.7 mW with a 6-Μm aperture werenobserved. The VCSELs were operated at 200 Mb/s (our equipment limit)nwith the rise and fall times of the optical output <1 nS
机译:为了确定制造用于光学互连和无空间光学处理的基于VCSEL的智能像素的最佳方法,已经开发并比较了三种用于将垂直腔激光发射激光器(VCSEL)结合到CMOS集成电路芯片的混合集成技术。三种键合技术中的每一种都以不同的方式将VCSEL连接到集成电路,并且将电触点连接到n镜和p镜。所有这三种技术都不会从VCSEL晶圆上移除基板,而留下了与单个像素相连的单个nVCSEL阵列。键合VCSEL的4×4和/或8×8n阵列产生非键合VCSEL的典型电学和光学特性。测量的阈值电压低至1.5 V,动态电阻低至30Ω,表明获得了良好的电接触。对于具有20μm孔径的VCSEL和具有6μm孔径的0.7mW的VCSEL,其光功率高达〜10 mW。 VCSEL以200 Mb / s(我们的设备极限)运行,光输出的上升和下降时间<1 nS

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