Efficient and Economical Test Equipment Setup Using Procorrelation

摘要

The Procorrelation System (PCS) obtains a high-quality correlation between die failures on a premanufactured recorded correlation wafer and the test equipment setup for the current wafer lot. PCS greatly reduces analysis time and test cost, compared with conventional full-wafer probing and offers significant benefits for deep-submicron ICs. Before mass production test of semiconductor ICs, test engineers normally perform ATE setup for the particular circuit under test (CUT), adjusting the ATE for CUT parameters such as die size, first die position, and probing pressure. Because equipment variations directly affect yield, successful ATE setup is critical for high yield. Conventionally, engineers perform a correlation evaluation run that verifies setup integrity by probing a pretested wafer called the correlation wafer. The most popular correlation evaluation method is full-wafer probing because it is straightforward. FWP probes all dies on the correlation wafer by applying the full test pattern set. After the probing, engineers use heuristics to check that the current probing yield falls within a statistical interval determined by the previously recorded yield. In most cases, FWP is not economical, especially when the number of test patterns is large or the wafer is large but the dies are small. As IC fabrication technologies advance, FWP is becoming unacceptable for mass production test of current and future products. Here, we present a correlation evaluation system called the Procorrelation System (PCS). In addition to improving correlation quality, PCS is cost-effective and greatly reduces ATE time. Instead of fully probing the wafer, PCS uses a partial-probing scheme, which selects the most-suitable dies to be probed in a geographically balanced manner. We also present our probing criteria, so that test engineers can automate the correlation analysis process. With the partial-probing scheme and the probing criteria, PCS statistically achieves very low cost and high quality. By adding a second-phase correlation evaluation process in which we use FWP with a pilot wafer during production test, we further improve correlation quality without extra test resources. Our experimental results show that PCS is a quick and precise solution, outperforming FWP at a much lower cost. In our implementation, PCS has additional functions, including flow control and failure diagnosis and analysis. It thus provides a complete correlation evaluation process with low overhead and is now a formal correlation analysis system used at four Taiwan Semiconductor Manufacturing Co. test sites.