FIDIAS: an integral approach to high-level synthesis

摘要

An integral approach to the problem of high-level synthesis ofndigital architectures as implemented in the FIDIAS synthesis system isndescribed. The synthesis task is split into different subtasks, theninterrelation between them is no longer ignored as happens in mostnsystems. One of the system's outstanding features is the control ofnglobal system behaviour performed by an expert system that deals withnsuch interrelations and aims it towards the required goals. The mostnimportant subtasks are explained in detail. Among these subtasks,ncycle-time estimation, operation scheduling, allocation search algorithmnand area estimation are found. Heuristics for intelligent bounding ofnthe design space during allocation are shown. Also presented is one ofnthe most novel features of FIDIAS, which is the use of heuristics tonguide the search performed by the allocation algorithm through thenaccessible design space