Synthesis of MVL functions using input and output assignments

摘要

A number of decomposition based mapping techniques are proposed. In these techniques, the synthesis problem is formulated as a mapping from an input matrix to an output matrix. The minimisation is obtained by constructing 'matching-count matrix'. The entries of the matching-count matrix MC/sub ij/ represent the number of entry matches between the input variable number i in the input matrix (X) and the output function number j in the output matrix (Y). It then selects those input output pairings that give the maximum matching count, thus maximising the number of switching operations which can be eliminated in the realisation of multiple-valued logic (MVL) functions. The proposed techniques are classified as: output-phase with complement, input-phase with and without complement. Numerical results are presented to show that the proposed techniques result in significant reduction in the number of switching operators required for the implementation of 5000 randomly generated r-valued functions (for r=3, 4 and 5). It is also shown that the input-phase assignment techniques do not require any additional hardware circuitry at the output to restore the original function. This may give this technique an edge over other techniques.