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Altering transistor positions: impact on the performance and power dissipation of dynamic latches and flip-flops

机译:更改晶体管位置:影响动态锁存器和触发器的性能和功耗

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摘要

Floating nodes is a point of concern in dynamic latches and flip-flops. When floating these nodes are extremely susceptible to noise: their voltage level may get distorted owing to charge coupling with other nodes. The current approach to this problem is to convert these dynamic circuits into semistatic/static ones by using feedback transistors. Increased robustness in semistatic circuits comes at the expense of decreased performance and increased power dissipation. It is demonstrated that simply altering the relative positions of transistors can protect floating nodes from some of the sources of charge coupling. The simulation results show that for a 0.8 /spl mu/m process the proposed technique leads to a significant improvement in both the speed and power dissipation of the true single-phase clocking single and double edge-triggered flip-flops without compromising chip area.
机译:浮动节点是动态锁存器和触发器中的一个关注点。当这些节点浮动时,它们极易受到噪声的影响:由于与其他节点的电荷耦合,它们的电压电平可能会失真。当前解决该问题的方法是通过使用反馈晶体管将这些动态电路转换成半静态/静态电路。半静态电路中增强的鲁棒性是以降低性能和增加功耗为代价的。已经证明,简单地改变晶体管的相对位置可以保护浮动节点免受某些电荷耦合源的影响。仿真结果表明,对于0.8 / spl mu / m的工艺,所提出的技术导致了真正的单相时钟单边和双边沿触发触发器的速度和功耗的显着改善,而又不损害芯片面积。

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