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Design issues on high-speed high-resolution track-and-holds in BiCMOS technology

机译:BiCMOS技术中的高速高分辨率采样保持的设计问题

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The authors address some fundamental issues in track-and-hold (T and H) design. A number of explicit expressions characterising the main limitations of this class of circuits are given. A fully differential open-loop T and H is presented satisfying the stringent specifications imposed by present telecom applications. It exhibits high-resolution (12 bit) and high-speed (f/sub ck/=160 MHz) as measured on samples integrated in a standard 0.8 /spl mu/m 12-GHz BiCMOS technology. The overall performance is beyond state-of-the-art. The T and H's size is 0.37 mm/sup 2/, and it consumes 45 mA from a 5 V power supply.
机译:作者讨论了跟踪和保持(T和H)设计中的一些基本问题。给出了许多表征此类电路主要局限性的明确表达式。提出了一种完全差分的开环T和H,以满足当前电信应用施加的严格规范。在以标准0.8 / spl mu / m 12 GHz BiCMOS技术集成的样本上测量时,它具有高分辨率(12位)和高速(f / sub ck / = 160 MHz)。整体性能超出了最先进的水平。 T和H的尺寸为0.37 mm / sup 2 /,从5 V电源消耗的电流为45 mA。

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