Analysis and improvement of the noise immunity in a single-chipsuper-regenerative transceiver

摘要

The authors present a methodology for rapid verification ofnsubstrate noise problems in a single-chip transceiver. The procedurenallows knowing, with reasonable accuracy, how much isolation is obtainednbetween parasitic and sensitive blocks without taking into account allnthe irrelevant details. The analysis of the noise coupling problem isntherefore greatly accelerated allowing verification of a large varietynof isolation strategies. The procedure is illustrated on a single-chipnBiCMOS super-regenerative transceiver dedicated to ISM applications.nTechniques allowing a reduction of the noise injection in the substratenby the different noisy parts of the circuit are also presented