Fully differential switched-current memory cell with lowcharge-injection errors

摘要

A fully differential switched-current memory cell with lowncharge-injection errors is proposed. The cell uses constant-voltagenswitching to obtain signal-independent charge injection, which isnrejected using suitable differential structures. The cell is designednusing a 0.35 Μm digital CMOS process. Simulation results of the cellnwith a clock frequency of 13 MHz and with input signal amplitudes nearlynas high as the bias current (600 ΜA) show a total harmonic distortionnof -66 dB, a current transfer error of less than 0.4% and ansignal-to-noise ratio of 60 dB