In a VLSI design environment where a range of chip technologies are available and concurrent chip designs are commonplace, it is not feasible to build a wiring program for each technology. Additionally, a chip's design methodology may demand specific abilities from a wiring program. KWIRE was developed to meet the needs of a multiple-technology, multiple-methodology VLSI design community. It has been used on a range of chips, from small designs to custom microprocessors. Modeling the users' designs and design rules in geometric terms allows KWIRE to handle such a diversity of chip designs. This paper describes the KWIRE system and router.
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