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首页> 外文期刊>Far East Journal of Electronics and Communications >A CAPACITOR-LESS TRANSIENT-RESPONSE-IMPROVED CMOS LOW-DROPOUT REGULATOR
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A CAPACITOR-LESS TRANSIENT-RESPONSE-IMPROVED CMOS LOW-DROPOUT REGULATOR

机译:无需电容的瞬态响应改进型CMOS低压降稳压器

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摘要

A 1.7V 100mA capacitor-less CMOS low-dropout (LDO) regulator for system-on-chip applications which can both reduce board space and external pins is presented. By using a combination of fast transient improvement and frequency compensation method, the proposed LDO regulator provides a fast transient response, as well as good stability during the whole variation of load current. The proposed LDO regulator has been implemented in a 0.18μm CMOS process, and the active chip area is 0.15mm~2. The voltage derivation is less than 30mV for the load current change between 0 and 100mA. The dropout voltage is about 300mV at 100mA load current.
机译:提出了一种适用于片上系统应用的1.7V 100mA无电容器CMOS低压降(LDO)稳压器,该稳压器可以减少电路板空间和外部引脚。通过结合快速瞬态改善和频率补偿方法,所提出的LDO稳压器提供了快速瞬态响应,并且在整个负载电流变化期间都具有良好的稳定性。拟议中的LDO稳压器已采用0.18μmCMOS工艺实现,有源芯片面积为0.15mm〜2。当负载电流在0至100mA之间变化时,电压导数小于30mV。负载电流为100mA时,压差约为300mV。

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