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FPGA-Based Submicrosecond-Level Real-Time Simulation of Solid-State Transformer With a Switching Frequency of 50 kHz

机译:基于FPGA的亚微秒级实时模拟固态变压器,开关频率为50 kHz

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The switching frequency of power electronic devices has become much higher than before, which brings great challenges to real-time simulators. The small time step in high switching frequency simulations remarkably increases the difficulty to satisfy the real-time requirement. This article realizes the accurate real-time simulation of a solid-state transformer (SST) with a switching frequency of 50 kHz at the time step of 250 ns on a field-programmable gate array (FPGA)-based platform. The hybrid companion circuit modeling method and the compact-electromagnetic transient program (EMTP) algorithm are proposed in this article to make sure that the simulation loop can complete in less than 1 mu s. The hybrid companion circuit modeling method can avoid too many digits used in representing simulation variables. The compact-EMTP algorithm is designed by combining the sequential computation tasks of the traditional EMTP to fully utilize the parallelized hardware structure of the FPGA. Besides, a circuit partition method is adopted to further parallelize the circuit solution of the SST circuit. In these ways, the simulation loop of the SST can be completed in 38 clock cycles (about 237.5 ns). The simulation results show that the real-time simulation waveforms are almost consistent with those of the off-line simulation software. Besides, the hardware-in-theloop (HIL) simulation can also be performed on this platform to test the control functions of the SST.
机译:电力电子设备的开关频率变得远远高于以前,这对实时模拟器带来了极大的挑战。高开关频率模拟中的小型时间步长显着增加了满足实时要求的难度。本文在现场可编程门阵列(FPGA)的平台上,实现了在250 ns的时间步长的50kHz的切换频率的精确实时模拟。本文提出了混合伴随电路建模方法和紧凑型电磁瞬态程序(EMTP)算法,以确保仿真环路可以在不到1亩。混合伴随电路建模方法可以避免用于表示模拟变量的太多数字。 Compact-EMTP算法是通过组合传统EMTP的顺序计算任务来充分利用FPGA的并行硬件结构的顺序计算任务来设计。此外,采用电路分区方法进一步并行化SST电路的电路解决方案。在这些方式中,SST的仿真环路可以在38个时钟周期中完成(约237.5 ns)。仿真结果表明,实时仿真波形几乎与离线仿真软件的仿真波形一致。此外,还可以在该平台上执行硬件内(HIL)仿真以测试SST的控制功能。

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