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Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition

机译:用于真实世界模式识别的同质尖峰神经形态系统

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摘要

A neuromorphic chip that combines CMOS analog spiking neurons and memristive synapses offers a promising solution to brain-inspired computing, as it can provide massive neural network parallelism and density. Previous hybrid analog CMOS-memristor approaches required extensive CMOS circuitry for training, and thus eliminated most of the density advantages gained by the adoption of memristor synapses. Further, they used different waveforms for pre and post-synaptic spikes that added undesirable circuit overhead. Here we describe a hardware architecture that can feature a large number of memristor synapses to learn real-world patterns. We present a versatile CMOS neuron that combines integrate-and-fire behavior, drives passive memristors and implements competitive learning in a compact circuit module, and enables in situ plasticity in the memristor synapses. We demonstrate handwritten-digits recognition using the proposed architecture using transistor-level circuit simulations. As the described neuromorphic architecture is homogeneous, it realizes a fundamental building block for large-scale energy-efficient brain-inspired silicon chips that could lead to next-generation cognitive computing.
机译:结合了CMOS模拟尖峰神经元和忆阻突触的神经形态芯片为大脑启发式计算提供了一个有前途的解决方案,因为它可以提供大量的神经网络并行性和密度。以前的混合模拟CMOS忆阻器方法需要大量的CMOS电路进行训练,因此消除了采用忆阻器突触所获得的大多数密度优势。此外,他们为突触前和突触后尖峰使用了不同的波形,这增加了不良的电路开销。在这里,我们描述了一种硬件体系结构,该体系结构可以具有大量忆阻器突触来学习实际模式。我们提出了一种通用的CMOS神经元,该神经元结合了集成和发射行为,驱动无源忆阻器,并在紧凑的电路模块中实现竞争性学习,并实现了忆阻器突触的原位可塑性。我们使用晶体管级电路仿真,通过提出的体系结构演示了手写数字识别。由于所描述的神经形态架构是同质的,因此它为大规模节能的大脑启发型硅芯片实现了基本的构建基块,这可能会导致下一代认知计算。

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