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首页> 外文期刊>Embedded Systems Letters, IEEE >BOUNCE: A New High-Resolution Time-Interval Measurement Architecture
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BOUNCE: A New High-Resolution Time-Interval Measurement Architecture

机译:BOUNCE:一种新的高分辨率时间间隔测量架构

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摘要

Measuring the duration of a time interval is a discretization process in which an input signal is sampled at discrete time steps. Most digital systems generate these time steps by active components, such as a generator, flip-flops, dedicated delay elements, gates, inverters, and the like, whose signal propagation time determine the system's resolution. This paper presents a new time-interval measurement architecture, called BOUNCE, in which the delays are realized by the simplest elements possible: the (metal) wires between the logic elements within the chip. Standard RS latches serve as the sampling units. Even though the requirements with respect to setup and hold times of these latches are not met, the architecture operates quite reliably: on an Altera Stratix II field-programmable gate array, BOUNCE yields a time resolution better than 4 ps. Due to its architecture, BOUNCE is ideally suited to be implemented on field-programmable gate arrays and can thus be realized as an embedded system on its own or as part of an existing one.
机译:测量时间间隔的持续时间是一种离散化过程,其中以离散的时间步长对输入信号进行采样。大多数数字系统通过有源组件(例如,发生器,触发器,专用延迟元件,门,反相器等)生成这些时间步,它们的信号传播时间决定了系统的分辨率。本文提出了一种称为BOUNCE的新时间间隔测量架构,其中的延迟是通过最简单的元素实现的:芯片内逻辑元素之间的(金属)导线。标准RS锁存器用作采样单元。即使不满足关于这些锁存器的建立和保持时间的要求,该体系结构仍能可靠运行:在Altera Stratix II现场可编程门阵列上,BOUNCE产生的时间分辨率优于4 ps。由于其架构,BOUNCE非常适合在现场可编程门阵列上实现,因此可以单独实现为嵌入式系统,也可以实现为现有系统的一部分。

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