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Seven Obstacles in the Way of Standard-Compliant Parallel SystemC Simulation

机译:符合标准的并行SystemC仿真方式中的七个障碍

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摘要

The IEEE 1666-2011 standard defines SystemC based on traditional discrete event simulation (DES) and sequential co-routine semantics, despite explicit parallelism in the model and ample parallel processor cores available in today’s host computers. In order to evolve the SystemC standard toward faster parallel DES, substantial hurdles must be overcome. This letter identifies seven obstacles in the standard that stand in the way of efficient parallel SystemC simulation, namely the co-routine semantics, simulator state, lack of thread safety, the role of channels, TLM-2.0, sequential mindset, and temporal decoupling. For each obstacle, we discuss the problem and propose a potential solution toward truly parallel SystemC. This letter to the editor is meant to identify difficulties with IEEE SystemC and stimulate fruitful discussion in the community.
机译:IEEE 1666-2011标准基于传统的离散事件仿真(DES)和顺序协同例程语义定义了SystemC,尽管该模型具有显式的并行性,并且在当今的主机中有足够的并行处理器内核。为了使SystemC标准朝着更快的并行DES发展,必须克服很多障碍。这封信指出了标准中阻碍高效并行SystemC仿真的七个障碍,即协同例程语义,模拟器状态,缺少线程安全性,通道的作用,TLM-2.0,顺序思维方式和时间去耦。对于每个障碍,我们讨论该问题,并提出针对真正的并行SystemC的潜在解决方案。致编辑的这封信旨在确定IEEE SystemC的困难并激发社区中富有成果的讨论。

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