3 V low noise amplifier implemented using a 0.8 /spl mu/m CMOS process with three metal layers for 900 MHz operation

摘要

A 3 V CMOS low noise amplifier (LNA) was implemented in a 0.81 /spl mu/m CMOS process. This is the first CMOS amplifier which integrates input and output matching networks and integrated inductors formed using a conventional process. The LNA achieves a power gain of 14.3 dB and a noise figure of 4.5 dB, with a centre frequency of 820 MHz.