55.0 Gbit/s/cm data bandwidth density interface in 0.5 /spl mu/m CMOS for advanced parallel optical interconnects

摘要

The authors demonstrate that low cost 0.5 /spl mu/m CMOS technology may be used to form a bridge between a slow parallel electrical interface and a very high-speed parallel optical interface. The 1 cm wide integrated circuit produced has a bisection data bandwidth of 55 Gbit/s and dissipates 5.7 W.