I_(DDQ)-based diagnosis at very low voltage (VLV) for bridging defects

摘要

Bridging defects generate two currents related to the fault-free case: bridge current and downstream current. The latter may complicate the diagnosis of bridging defects. However, in CMOS technologies, the downstream current can be minimised at low power supply (V_(DD)) values, thus facilitating the diagnosis of such defects. Experimental evidence of this behaviour is presented.