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3ߝ10 GHz ultra-wideband low-noise amplifier with new matching technique

机译:具有新匹配技术的3ߝ10GHz超宽带低噪声放大器

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摘要

A low-power and low-noise amplifier with a new input- matching technique using 0.18 mm CMOS technology for ultra-wideband applications is presented. A proposed broadband input match can be acquired easily by selecting an appropriate width of the transistor, which will effectively avoid the usage of the low-Q on-chip inductors in the input network. Moreover, demonstrated is the feasibility of the inter-stage resonator to accomplish bandwidth enhancement without additional power consumption. The IC prototype achieves good performances such as a power gain of 16.2 dB, a better than 10 dB input return loss, and 2.3 dB minimum noise figure while consuming a DC core power of only 6.8 mW.
机译:提出了一种采用新的输入匹配技术的低功耗,低噪声放大器,该技术使用了0.18 mm CMOS技术,用于超宽带应用。通过选择适当的晶体管宽度,可以轻松获得建议的宽带输入匹配,这将有效避免在输入网络中使用低Q片上电感器。而且,证明了级间谐振器在不增加功耗的情况下实现带宽增强的可行性。该IC原型具有良好的性能,例如16.2 dB的功率增益,优于10 dB的输入回波损耗和2.3 dB的最小噪声系数,同时仅消耗6.8 mW的DC核心功率。

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