Innovative Algorithm Allows Row-Column Self-Repair Of RAMs

摘要

Anew algorithm for row-column self-repair of RAMs promises to improve both the yield and testability of modern microprocessors. The technique, developed by Dilip K. Bhavsar of the Alpha Development Group, Compaq Corp., Shrewsbury, Mass., supports built-in self-test (BIST) and built-in self-repair of large embedded-RAM arrays with spare rows and columns. It generates and analyzes the required failure-bitmap information on-the-fly during self-test and then automatically repairs and verifies the repaired RAM arrays.