Low-Power Transparent RFID Circuits Using Enhancement/Depletion Logic Gates Based on Deuterium-Treated ZnO TFTs

摘要

Transparent radio frequency identification (RFID) integrated circuits based on ZnO thin film transistors were developed by using ratioed logic gates with depletion loads. The fabrication of these logic gates employed a simple deuterium plasma treatment to adjust the threshold voltages of the load transistors. Inverters were realized with full swing (0.02 ~ 4.99V), high gain of -48V/V, large noise margin, and small area. RFID circuits based on such logic gates exhibited ultra-low power dissipation of 8.28 μW at a supply voltage of 2.4 V and a considerably high data rate of 1.6 kb/s, which may open up possibilities for applications including transparent, low-cost RFID tags.