High accuracy analogue multiplier

摘要

This paper describes the circuitry, construction and performance of an analogue multiplier which achieves an accuracy within 0.03%. The technique employed involves splitting one analogue input signal into two parts, one in digital form and the other in analogue form. The two parts are separately multiplied by the other input signal, the results summed together to obtain the required product. Here, particular emphasis is laid on the circuitry and construction necessary to achieve high accuracy while minimising the effects of the inevitable switching involved with this method.