In search of cool computing

摘要

The biggest challenge facing SOC (system-on-chip) designers today is how to deliver higher performance and minimize IC power and the attendant heat. Power and cooling needs are pushing the limits of available technology and creating budgetary strains for users—both for the initial upgrades of power and cooling systems and for their ongoing energy costs. But in their attempts to solve these challenges, many chip designers have headed, down a blind alleyway. Many previous- and current-generation processors rely heavily on ILP (instruction-level parallelism) to speed single-threaded applications. ILP attempts to increase performance by determining, in real time, instructions that can execute in parallel. In their newest designs, chip developers are increasingly turning to CMPs (chip multiprocessors)—multiple processors on a single silicon die that reduce power demands and improve efficiency by sharing on-chip structures, such as memory controllers, between the cores versus two separate chips.