I once had to track down an intermittent power-on-reset problem. I designed an 8052-processor-based USB peripheral with external memory. The design used 74VHC573 octal latches to demultiplex the memory bus and for memory-mapped I/O. The power supply was more complicated than usual due to the requirements of this device: It needed USB power regulated to 3.3V dc, boosted up to 6V dc, and then regulated back down to create a 5V-dc reference. Because this peripheral received its power from the USB, we had to comply with USB-power specs: a 10-μF-capacitor-equivalent maximum inrush current and maximum 100-mA current draw from the USB supply. Due to the voltage-level translations in the power supply, the overall efficiency of the power supply was approximately 50%.
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