FPGA-design environment squeezes power consumption

摘要

EDA tools for FPGAs and ASICs commonly include optimization capabilities for timing and gate efficiency, but Actel claims that its new Li-bero Version 8.1 package is the first FPGA development tool to include low-power-optimization capability. The company has been promoting the miserly static- and dynamic-power consumption of its flash-based FPGAs, and the software tool allows designers to achieve additional power savings.