Make front-end power predictable

摘要

Power closure has moved to the forefront of design challenges for today's chip projects. Leakage power increases with each new process generation. Smaller geometries enable designs to fit more functions into less space, running at a higher speed. This situation creates exponential growth in power density, presenting a heat-removal challenge for all types of design, especially high-speed applications whose power you've never had to worry about before.