128 Points Low Area and Highly Pipelined FFT(Fast Fourier Transform) Processor

摘要

This paper represents low power and high speed 128- point pipelined Fast Fourier Transform (FFT) processor. The 128- point architecture consists of an optimized pipeline implementation processor . In the processor 128 -point DFT is divided into two smaller 8- and 16-point DFTs. The 8- and 16 -point DFTs are implemented by the Winograd small point FFT algorithms. The FFT128 processor has the minimum multiplier number which is equal to 4. These facts makes this FFT Processor attractive to implement in ASIC for used in OFDM modems, software defined radio, multichannel coding, and wideband Spectrum analysis.