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Electrical transport phenomena in nanostructured porous-silicon films

机译:纳米结构多孔硅膜中的电气传输现象

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The charge transport mechanisms in nanostructured porous silicon (PS) films were studied through current-voltage (I-V) measurements ofplanar Au/PS/Au structures in dark conditions at 300 K. The films were formed by electrochemical etching of1?5 ?-cm p-type Si (100)wafers producing PS layers of4.48×109?-cm. The charge transport is limited both by the space charge limited currents (SCLC) andthe carrier trapping- detrapping kinetics in the inherent localized PS energy levels. I-V characteristics evolve according to the trapping-detrapping carrier kinetics in the films showing that applying external bias, the electrical current can be controlled. For the first time thetrap filling limiting voltage (VTFL) was identified in PS films that shift between 1 and 3 volts by the carrier trapping-detrapping kinetics fromthe PS intrinsic defect states. An energy band diagram for the films is schematically depicted including defect states. To give a reasonableexplanation of the found behavior the existence of a thin silicon oxide film covering the network-like-silicon-nanocrystallites is required, inagreement with the widely accepted PS film structural models.
机译:通过在300k的暗条件下的电流 - 电压(IV)测量,通过电流 - 电压(IV)测量来研究纳米结构多孔硅(PS)膜中的电荷传输机制。通过电化学蚀刻来形成薄膜1≤5Ω·℃ -Type Si(100)晶片产生4.48×109的PS层。在固有的局部PS能量水平中,电荷传输由空间电荷限制电流(SCLC)和载体捕获 - 剥离动力学。 I-V特性根据显示外部偏压的薄膜中的捕获式剥离载体动力学而发展,可以控制电流。对于第一次填充限制电压(VTFL)在PS膜中识别出填充限制电压(VTFL),从PS内在缺陷状态的载体捕获 - 脱血动力学迁移1到3伏。薄膜的能带图示意性地描绘,包括缺陷状态。为了给出发现的行为的合理开发,需要存在覆盖网状硅纳米晶体的薄氧化硅膜的存在,与广泛接受的PS膜结构模型进行了原始。

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