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A Comparative Study of Majority/Minority Logic Circuit Synthesis Methods for Post-CMOS Nanotechnologies

机译:多数/少数逻辑电路合成方法对CMOS纳米技术的比较研究

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摘要

The physical limitations of complementary metal-oxide semiconductor style="font-family:Verdana;">?(CMOS) technology have led many researchers to consider other alternative technologies. Quantum-dot cellular automate (QCA), single electron tunneling (SET), tunneling phase logic (TPL), spintronic devices, etc., are some of the nanotechnologies that are being considered as possible replacements for CMOS. In these nanotechnologies, the basic logic units used to implement circuits are majority and/or minority gates. Several majority/minority logic circuit synthesis methods have been proposed. In this paper, we give a comparative study of the existing majority/minority logic circuit synthesis methods that are capable of synthesizing multi-input multi-output Boolean functions. Each of these methods is discussed in detail. The optimization priorities given to different factors such as gates, levels, inverters, etc., vary with technologies. Based on these optimization factors, the results obtained from different synthesis methods are compared. The paper also analyzes the optimization capabilities of different methods and discusses directions for future research in the synthesis of majority/minority logic networks.
机译:互补金属氧化物半导体的物理限制 <跨度样式=“Font-族:Verdana;”>?(CMOS)技术使许多研究人员们考虑了其他替代技术。量子点蜂窝自动化(QCA),单电子隧道(SET),隧道相位逻辑(TPL),旋转反相器件等,是一些被认为是CMOS可能的替代品的一些纳米技术。在这些纳米技术中,用于实现电路的基本逻辑单元是多数和/或少数栅极。已经提出了几种多数/少数逻辑电路合成方法。在本文中,我们提供了能够合成多输入多输出布尔函数的多数/少数逻辑逻辑合成方法的比较研究。详细讨论了这些方法中的每一种。提供给不同因素的优化优先级,如门,水平,逆变器等,随技术而异。基于这些优化因素,比较了从不同合成方法获得的结果。本文还分析了不同方法的优化能力,并讨论了对多数/少数逻辑网络合成的未来研究的指示。

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