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Efficient hardware implementation and analysis of true random‐number generator based on beta source

机译:基于Beta源的真正随机数发生器的高效硬件实现与分析

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This paper presents an efficient hardware random‐number generator based on a beta source. The proposed generator counts the values of “0” and “1” and provides a method to distinguish between pseudo‐random and true random numbers by comparing them using simple cumulative operations. The random‐number generator produces labeled data indicating whether the count value is a pseudo‐ or true random number according to its bit value based on the generated labeling data. The proposed method is verified using a system based on Verilog RTL coding and LabVIEW for hardware implementation. The generated random numbers were tested according to the NIST SP 800‐22 and SP 800‐90B standards, and they satisfied the test items specified in the standard. Furthermore, the hardware is efficient and can be used for security, artificial intelligence, and Internet of Things applications in real time.
机译:本文介绍了基于Beta源的高效硬件随机数发生器。所提出的生成器计数“0”和“1”的值,并提供一种方法来通过使用简单的累积操作进行比较来区分伪随机和真正的随机数。随机数发生器产生标记的数据,该数据指示计数值是否是基于所生成的标记数据的比特值的伪或真正的随机数。使用基于Verilog RTL编码和LabVIEW的系统进行硬件实现来验证所提出的方法。根据NIST SP 800-22和SP 800-90B标准测试生成的随机数,并满足标准中指定的测试项目。此外,硬件是有效的,可用于实时用于安全性,人工智能和事物互联网。

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