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A Coarse-Fine VCO-ADC for MEMS Microphones With Sampling Synchronization by Data Scrambling

机译:用于MEMS麦克风的粗细VCO-ADC,通过数据加扰采样同步

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This letter presents a mostly digital analog-to-digital converter implemented with voltage-controlled oscillators that can directly interface a capacitive MEMS microphone. The ADC is based on two ring oscillators and a coarse-fine counting circuitry. Coarse and fine counters are synchronized using a novel data scrambling technique to mitigate metastability and timing errors. This method enables a very low power consumption in the digital post-processing circuit. The proposed ADC, prototyped in 130-nm CMOS, achieves 73.8 dB-A of signal-to-noise and distortion ratio (SNDR) peak and 97 dB of dynamic range (DR) in a 20-kHz BW, while consuming 240 $mu ext{W}$ from the 1.5-V/1.2-V power supplies. In a reduced power mode (8 kHz BW) with relaxed oscillation parameters, it reaches 66.4 dB-A of SNDR peak and 93 dB of DR with a power consumption of only 77 $mu ext{W}$ .
机译:这封信主要带有电压控制振荡器实现的最具数字模数转换器,可直接接口电容MEMS麦克风。 ADC基于两个环形振荡器和粗细计数电路。使用新型数据加扰技术同步粗略和精细计数器以减轻衡量性和定时错误。该方法使数字后处理电路中的功耗非常低。所提出的ADC在130nm CMOS中原型化,实现了73.8dB-A的信号 - 噪声和失真率(SNDR)峰值和97dB的动态范围(DR),在20-KHz BW中,同时消耗240<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ mu text {w} $ 从1.5 V / 1.2-V电源。在具有宽松振荡参数的降低的电源模式(8 kHz BW)中,它达到了SNDR峰值的66.4 dB-A和93 dB DR,功耗仅为77<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ mu text {w} $

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