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首页> 外文期刊>The Journal of Engineering >Parallel wideband digital up-conversion architecture with efficiency
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Parallel wideband digital up-conversion architecture with efficiency

机译:平行宽带数字上转换架构具有效率

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Owing to the limited processing speed of current digital signal processing devices, digital generated signal frequency and bandwidth based on digital up-conversion technique has long been a bottleneck. Interpolation on the baseband signal puts great pressure on the following filtering and mixing operation. In this study, an efficient parallel architecture is presented, which moves the interpolation behind the filtering and mixing, and adopts parallel numerically controlled oscillator (NCO) arrays and poly-phase low-pass filter arrays to achieve the anticipated orthogonal mixing signal and prototype filter. Parallel NCO decomposition principle and mathematical derivation are elaborated, and realisation of the poly-phase filter arrays is also discussed. The proposed post-interpolation architecture can effectively relieve the filtering and mixing pressure including operation rate and computational complexity, which will benefit the hardware implementation. In the end, verification test of signal up-conversion with 400MHz bandwidth is launched to certify the architecture validity.
机译:由于当前数字信号处理装置的处理速度有限,基于数字上转换技术的数字产生的信号频率和带宽长期以来一直是瓶颈。基带信号的插值对以下滤波和混合操作产生了很大的压力。在该研究中,提出了一种有效的并联架构,其将插值移动并混合后面移动,并采用平行的数字控制振荡器(NCO)阵列和多相低通滤波器阵列,以实现预期的正交混合信号和原型滤波器。阐述了并行NCO分解原理和数学推导,并且还讨论了多相滤波器阵列的实现。所提出的后插架架构可以有效地缓解滤波和混合压力,包括操作率和计算复杂性,这将有利于硬件实现。最后,启动了信号上转换信号上转换的验证测试,以证明架构有效性。

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