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Design and implementation of MAC Transmitter for the transmission of UDP packet using FSM and verilog coding techniques

机译:使用FSM和Verilog编码技术传输UDP数据包的MAC发送器的设计和实现

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The purpose of this paper is to design and develop a MAC Transmitter on Field Programmable Gate Arrays (FPGA) that converts 32 bit data in to 4 bit DATA for transmitter. The data which is used for transmission is UDP Packet. The entire UDP packet will go as data for MAC frame. In this paper we design the Ethernet (IEEE 802.3) connection oriented LAN Medium Access Control Transmitter (MAC). It starts by describing the behavior of MAC circuit using Verilog. A synthesized Verilog model of the chip is developed and implemented on target technology. This paper will concentrate on the testability features that increase product reliability. It focuses on the design of a MAC Transmitter chip with embedded Built-In-Self- Test (BIST) architecture using FPGA technology
机译:本文的目的是设计和开发现场可编程门阵列(FPGA)上的MAC发送器,该发送器将32位数据转换为4位DATA以供发送器使用。用于传输的数据是UDP数据包。整个UDP数据包将作为MAC帧的数据。在本文中,我们设计了面向以太网(IEEE 802.3)连接的LAN介质访问控制发送器(MAC)。首先描述使用Verilog的MAC电路的行为。在目标技术上开发并实现了该芯片的综合Verilog模型。本文将重点介绍可测试性功能,这些功能可提高产品的可靠性。它着重于使用FPGA技术设计具有嵌入式内置自测(BIST)架构的MAC发送器芯片。

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