The impact of Moore's Law and loss of Dennard scaling: Are DSP SoCs an energy efficient alternative to x86 SoCs?

摘要

Moore'slaw,thedoublingoftransistorsperunitareaforeachCMOStechnologygeneration,isexpectedtocontinuethroughoutthedecade,whileDennardvoltagescalingresultinginconstantpowerperunitareastoppedaboutadecadeago.Thesemiconductorindustry'sresponsetothelossofDennardscalingandtheconsequentchallengesinmanagingpowerdistributionanddissipationhasbeenleveledoffclockrates,adieperformancegainreducedfromaboutafactorof2.8to1.4pertechnologygeneration,andmulti-coreprocessordieswithincreasedcachesizes.Increasedcachessizesoffersperformancebenefitsformanyapplicationsaswellasenergysavings.Accessingdataincacheisconsiderablymoreenergyefficientthanmainmemoryaccesses.Further,cachesconsumelesspowerthanacorrespondingamountoffunctionallogic.Asfeaturesizescontinuetobescaleddownanincreasingfractionofthediemustbe"underutilized"or"dark"duetopowerconstraints.Withpowerbeingaprimedesignconstraintthereisaconcertedefforttofindsignificantlymoreenergyefficientchiparchitecturesthandominantinserverstoday,withchipspotentiallyincorporatingseveraltypesofcorestocoverarangeofapplications,ordifferentfunctionsinanapplication,asisalreadycommonforthemobileprocessormarket.DigitalSignalProcessors(DSPs),largelytargetingtheembeddedandmobileprocessormarkets,typicallyhavebeendesignedforapowerconsumptionof10%orlessofatypicalx86CPU,yetwithmuchmorethan10%ofthefloating-pointcapabilityofthesametechnologygenerationx86CPUs.Thus,DSPscouldpotentiallyofferanenergyefficientalternativetox86CPUs.HerewereportanassessmentoftheTexasInstrumentsTMS320C6678DSPinregardstoitsenergyefficiencyfortwocommonHPCbenchmarks:STREAM(memorysystembenchmark)andHPL(CPUbenchmark)..