Optimal Design of Thermal Dissipation for the Array Power LED by using the RSM with Genetic Algorithm

摘要

In accordance with the enhancement for luminous efficiency improving, LED (Light Emitting Diode) has been gradually developed by combining the characteristics of small volume, impact resistance, good reliability, long life, low power consumption with multiple purposes for energy saving and environmental protection. Therefore, the array LED has been widely applied in human livings nowadays. This study applies the finite element analysis software ANSYS to analyze the thermal behavior of the array power LED work lamp which is modeled by four same-size LED with MCPCB (Metal Core Print Circuit Board) mounted on a base heat-sink. The Flotran heat flow analysis is applied to obtain the natural convection of air coefficient, while the convection value can be confirmed by the iterative method since it is set as the boundary condition for ANSYS thermal analysis to obtain the temperature distribution, accordingly the chip junction temperature and the base heat-sink temperature were followed through experiments in order to check if the simulation results meet the design requirements and coincide with the power LED product design specification. Prior to the optimal design process for chip junction temperature, the most significant parameters were first chosen by the fractional factorial design. The regressive models were respectively setup by the dual response surface method (RSM) and the mixed response surface method. Furthermore, the genetic algorithm combined with response surface method was applied to acquire the optimal design parameters, and the results were obtained from both methods, which are reviewed for comparison. Afterwards, the mixed response surface method is adopted to investigate the effects of interactions among various factors on chip junction temperature. In conclusion, it is found that the thermal conductivity of MCPCB and the height of base heat-sink are the two major significant factors. In addition, the interactive effects between chip size and thermal conductivity of chip adhesion layer are acknowledged as the most significant interaction influenced on the chip junction temperature.