Real-time video demands a stringent delay and jitter requirement. A switch in the network needs to implement an effective scheduling algorithm to meet such a requirement. The Jitter-EDD (Earliest-Due-Date) scheme designed for packet switching networks is noted for its capability to control the end-to-end delay jitter to be within the delay variation in the last switching node of the path. It, however, cannot be used in an ATM network directly due to the lack of space in the ATM cell header to carry the required correction term. We propose a method to implement the J-EDD scheme in the ATM network and evaluate its performance in transporting real-time VBR video streams. A critical system design issue is also identified.
展开▼
