...
首页> 外文期刊>Electronics >Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things
【24h】

Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

机译:使用物联网新兴技术的超低功耗设计和硬件安全

获取原文

摘要

In this review article for Internet of Things (IoT) applications, important low-power design techniques for digital and mixed-signal analog–digital converter (ADC) circuits are presented. Emerging low voltage logic devices and non-volatile memories (NVMs) beyond CMOS are illustrated. In addition, energy-constrained hardware security issues are reviewed. Specifically, light-weight encryption-based correlational power analysis, successive approximation register (SAR) ADC security using tunnel field effect transistors (FETs), logic obfuscation using silicon nanowire FETs, and all-spin logic devices are highlighted. Furthermore, a novel ultra-low power design using bio-inspired neuromorphic computing and spiking neural network security are discussed.
机译:在这篇有关物联网(IoT)应用的评论文章中,介绍了用于数字和混合信号模数转换器(ADC)电路的重要低功耗设计技术。示出了超出CMOS的新兴低压逻辑器件和非易失性存储器(NVM)。此外,还审查了能耗受限的硬件安全问题。具体来说,重点介绍了基于轻量级加密的相关功率分析,使用隧道场效应晶体管(FET)的逐次逼近寄存器(SAR)ADC安全性,使用硅纳米线FET的逻辑混淆以及全旋转逻辑器件。此外,还讨论了一种新的超低功耗设计,该设计使用了生物启发式神经形态计算技术和尖峰神经网络安全性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号