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Arithmetic circuits with locally low algebraic rank

机译:局部代数秩较低的算术电路

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In recent years there has been a flurry of activity proving lower bounds for homogeneous depth-4 arithmetic circuits [GKKS13, FLMS14, KLSS14, KS14c], which has brought us very close to statements that are known to imply VP = VNP. It is a big question to go beyond homogeneity, and in this paper we make progress towards this by considering depth-4 circuits of {it low algebraic rank}, which are a natural extension of homogeneous depth-4 arithmetic circuits. A depth-4 circuit is a representation of an N -variate, degree n polynomial P as P = T i =1 Q i 1 Q i 2 Q it where the Q i j are given by their monomial expansion. Homogeneity adds the constraint that for every i [ T ] , j degree ( Q i j ) = n . We study an extension where, for every i [ T ] , the {it algebraic rank} of the set of polynomials Q i 1 Q i 2 Q it is at most some parameter k . We call this the class of ( k ) circuits. Already for k = n , these circuits are a strong generalization of the class of homogeneous depth-4 circuits, where in particular t n (and hence k n ).We study lower bounds and polynomial identity tests for such circuits and prove the following results. 1. Lower bounds : We give an explicit family of polynomials P n of degree n in N = n O (1) variables in VN P , such that any ( n ) circuit computing P n has size at least exp ( ( n log N )) . This strengthens and unifies two lines of work: it generalizes the recent exponential lower bounds for {it homogeneous} depth-4 circuits[KLSS14, KS14c] as well as the Jacobian based lower bounds of Agrawal et al [ASSS12] which worked for ( k ) circuits in the restricted setting where T k n . 2. Hitting sets : Let ( k ) [ d ] be the class of ( k ) circuits with bottom fan-in at most d . We show that if d and k are at most poly ( log N ) , then there is an explicit hitting set for ( k ) [ d ] circuits of size quasipolynomial in N and the size of the circuit. This strengthens a result of Forbes [For15] which showed such quasipolynomial sized hitting sets in the setting where d and t are at most poly ( log N ) . end{enumerate}A key technical ingredient of the proofs is a result which states that over any field of characteristic zero (or sufficiently large characteristic), upto a translation, every polynomial in a set of algebraically dependent polynomials can be written as a function of the polynomials in the transcendence basis. We believe this may be of independent interest. We combine this with shifted partial derivative based methods to obtain our final results.
机译:近年来,出现了一系列活动,证明了均匀深度4算术电路[GKKS13,FLMS14,KLSS14,KS14c]的下界,这使我们非常接近已知隐含VP = VNP的陈述。超越同质性是一个很大的问题,在本文中,我们通过考虑{ it低代数秩}的深度4电路朝着这一方向发展,这是齐次的深度4算术电路的自然扩展。深度为4的电路表示N变量n次多项式P,其中P = T i = 1 Q i 1 Q i 2 Q it,其中Q i j由其单项展开式给出。同质性增加了以下约束:对于每个i [T],j度(Q i j)= n。我们研究了一个扩展,对于每个i [T],多项式Q i 1 Q i 2 Q的{ it代数秩}最多是某个参数k。我们称其为(k)电路类。对于k = n,这些电路已经很好地概括了均匀深度4电路的类,其中特别是t n(因此k n)。我们研究了此类电路的下界和多项式恒等性检验,并证明了以下结果。 1.下界:在VN P中,我们在N = n O(1)个变量中给出一个阶数为n的显式多项式P n,使得任何(n)个计算P n的电路的大小至少为exp((n log N ))。这加强并统一了两条工作线:概括了{ it齐均}深度4电路[KLSS14,KS14c]的最新指数下界,以及Agrawal等人[ASSS12]基于雅可比行列的下界,该作品为( k)电路处于限制设置,其中T kn。 2.击中集:令(k)[d]为最多具有d底扇入的(k)电路的类别。我们表明,如果d和k最多为poly(log N),则对于(k)[d]个大小为N的拟多项式电路和该电路的大小,存在明确的命中集。这加强了福布斯[For15]的结果,该结果显示了在d和t最多为poly(log N)的情况下,此类多项式大小的命中集。 end {enumerate}证明的关键技术成分是一个结果,该结果表明在特征零(或足够大的特征)的任何字段上,直到平移,一组代数相关多项式中的每个多项式都可以写为一个函数在超越基础上的多项式。我们认为这可能与独立利益有关。我们将其与基于偏移偏导数的方法相结合以获得最终结果。

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